Design-Reuse

RISC-V source class riscv_asm_program_gen, the brain behind assembly instruction generator

CHIPS Alliance has developed an open-source riscv-dv random instruction generator for RISC-V processor verification. This article focuses on the class riscv_asm_program_gen.sv and its various ...
Business Insider

New RISC-V Certification to Help Those Seeking Entry-Level RISC-V Roles or to Transition from Another Architecture

The RISC-V Foundational Associate (RVFA) exam demonstrates the fundamental knowledge and skills necessary for RISC-V hardware and software professionals SAN FRANCISCO, Nov. 30, 2022 /PRNewswire/ -- ...
Semiconductor Engineering

Implementing Cryptographic Algorithms for the RISC-V Instruction Set Architecture in Two Cases

This new technical paper titled “Symmetric Cryptography on RISC-V: Performance Evaluation of Standardized Algorithms” was published by researchers at Intel, North Arizona University and Google, with ...
TechCrunch

Google’s Flutter showcases new graphics capabilities, WebAssembly and RISC-V support

Flutter, Google’s open-source framework for building multi-platform apps for mobile, web and desktop, is hosting its Flutter Forward event in Nairobi, Kenya today. As the name implies, the team is ...
Electronic Design

Working with High-Level-Language Debuggers in RISC-V-Based Apps

What are the RISC-V External Debug Support Version 0.13.2 specifications? Advantages of a using high-level-language debugger. The role of the ubiquitous breakpoints in debugging. How trace is ...
KXAN

New RISC-V Certification to Help Those Seeking Entry-Level RISC-V Roles or to Transition from Another Architecture

The RISC-V Foundational Associate (RVFA) exam demonstrates the fundamental knowledge and skills necessary for RISC-V hardware and software professionals RISC-V is an open standard Instruction Set ...